Hardware Engineer

Hardware Engineer Cybersecurity Jobs

4 jobs found

21d ago

Senior/Principal R&D Cybersecurity - Semiconductor Fabrication Process Engineer

Sandia National Laboratories Albuquerque, NM

Albuquerque, NM

21d ago

$118k - $236k/yr Full time Senior Engineer Hardware Engineer

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Job Description

Sandia National Laboratories is seeking an R&D cybersecurity-focused Semiconductor Fabrication Process Engineer to support microelectronics hardware security research and assurance activities for national security missions. The position emphasizes protective technology development and hardware evaluation, with onsite work required in Albuquerque, New Mexico.

Role Summary

In this role, you will contribute to innovative microelectronics hardware security research and assurance, applying cybersecurity and microelectronics expertise to devices, processing, and failure analysis. Responsibilities include developing protective technologies and evaluating hardware for high-consequence systems to support mission needs.

Key Responsibilities

Conduct innovative and creative research using Sandia’s microelectronic hardware security and cyber capabilities to develop protective technologies and evaluate hardware for high-consequence systems.
Collaborate with professionals across Sandia and partner organizations to create protective technologies and tools that help secure critical applications.
Lead one or more hardware-based microelectronics assurance projects.
Build relationships with external sponsors and serve as a semiconductor subject matter expert in small group settings or at larger presentations.

Required Qualifications

A Bachelor’s degree in a relevant discipline and five (5) years of directly relevant experience, or an equivalent combination of directly relevant education and engineering or scientific experience demonstrating the ability to perform independent research and development.
Ability to obtain and maintain a DOE Q and SCI clearance, which may require a polygraph test.

Additional Qualifications Desired

A graduate degree in Computer Science/Engineering, Electrical Engineering, Computer Information Systems, Computer Forensics, Mathematics, or a directly related field where an independent research project was required (for example, an independent project, thesis, or dissertation).
Experience in reverse engineering, software vulnerability assessment, web application assessment, computer networking, computer architecture, compilers, or similar computer security topics.
Proficiency in scripting or high-level programming.
Familiarity with secure-system design and information assurance principles.
Strong communication skills, including the ability to develop technical ideas and results and present them in oral and written form in a concise manner.
Ph.D. experience in Electrical Engineering, Materials Science, Physics, or another relevant STEM field.
Experience with semiconductor device fabrication, including device testing, materials characterization, or failure analysis.
Experience with Artificial Intelligence hardware platforms (GPUs, HBMs, etc.).
Direct experience as a process or equipment engineer supporting fabrication of state-of-the-art microelectronics (including lithography, etch, thin films, chemical-mechanical polish, packing/heterogeneous integration, etc.).
Experience with failure analysis of state-of-the-art microelectronics.
Experience with common materials analysis tools (e.g., SEM, FIB, AFM, TEM, STM, etc.).
Demonstrated experience developing and maintaining effective relationships with external sponsors.
Strong interpersonal skills and ability to work in a team environment.
Active DOE Q and SCI security clearance.

What Your Job Will Be Like

Our research group develops advanced microelectronics hardware assessment capabilities supporting a broad range of National Security missions.
Due to the nature of the work, the selected applicant must be able to work onsite.

About the Team

This department develops and executes microelectronics hardware analysis research programs in collaboration with Sandia’s S&T community and external partners. The team provides mission leadership for Sandia’s state-of-the-art assessment capabilities addressing embedded system and microelectronics measurement and analysis challenges.

Location and Work Model

Location: Albuquerque, NM
Work arrangement: Onsite

Compensation

Salary range: USD 117,500 - 235,700 per year.

Posting Duration

This posting will be open for application submissions for a minimum of three (3) calendar days, including the posting date.
Sandia reserves the right to extend the posting date at any time.

Security and Background Requirements

Sandia is required by DOE to conduct a pre-employment drug test and background review, including checks of personal references, credit, law enforcement records, and employment/education verifications.
Applicants must be able to obtain and maintain a DOE Q-level security clearance and SCI access; both require US citizenship.
SCI access may require a polygraph examination.
If you hold more than one citizenship (US and another country), your ability to obtain these levels of access may be impacted.
Applicants offered employment are subject to a federal background investigation if duties require a DOE security clearance.
Substance abuse or illegal drug use, falsification of information, criminal activity, serious misconduct, or other indicators of untrustworthiness can lead to clearance denial or termination by DOE, preventing performance of assigned duties and resulting in employment termination.

NNSA Requirements for MedPEDs

If you have a Medical Portable Electronic Device (MedPED) (such as a pacemaker, defibrillator, drug-releasing pump, hearing aids, or other diagnostic equipment), you may be required to comply with NNSA security requirements if employed.
If you have a MedPED and are selected for an on-site interview, additional steps may be required to ensure compliance with NNSA security requirements before the interview date.

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1mo ago

Security Engineer, Data Center Network Device Security

Google Sunnyvale, CA

Sunnyvale, CA

1mo ago Closed

$147k - $210k/yr Full time Ai Security Engineer Hardware Engineer

This position is no longer accepting applications (closed Oct 29, 2026).

Job Description

As a Security Engineer on Google’s Data Center Network Device Security team, you will help assess and strengthen the security of network devices deployed in Google datacenters. The role combines threat modeling, security reviews, and the design of controls, with AI-supported review campaigns for specifications and firmware, alongside technical guidance for platform infrastructure teams.

Role Overview

You will scope and perform security reviews for network devices used in Google datacenters. Responsibilities include developing threat models, conducting risk-focused assessments, and defining security requirements for devices entering data center environments, with particular attention to verified boot and embedded components. You will also design security controls and provide subject matter expertise to Platform Infrastructure Engineering (PIE) teams building next-generation data center hardware.

Key Responsibilities

Identify security issues and implement security controls, tools, and services to improve security systems and processes.
Develop and refine threat models, conduct security reviews, and define security requirements for network device products entering Google’s data centers, focusing on verified boot and embedded components.
Run AI-supported security review campaigns on specifications and platform firmware, including binaries.
Serve as subject matter expert for Platform Infrastructure Engineering (PIE) teams designing and developing next-generation data center hardware.

Minimum Requirements

Bachelor’s degree or equivalent practical experience.
2 years of experience with security assessments or security design reviews or threat modeling.
2 years of experience with security engineering, computer and network security, and security protocols.
2 years of coding experience in one or more general purpose languages.

Technology Focus

C, C++
Embedded systems
Fuzzing
X86/Assembly and ARM Assembly
Cryptography

Preferred Qualifications

Knowledge of security, reverse engineering, firmware, C, C++, and embedded systems.
Understanding of fuzzing, X86/Assembly, ARM Assembly, vulnerability assessment, and cryptography.

Location and Schedule

Sunnyvale, CA (onsite)

Compensation

USD 147,000 - 210,000 per year

Compensation and Benefits

15% bonus target
Equity
Benefits

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1mo ago

Senior Hardware Security Engineer

Microsoft Redmond, WA

Redmond, WA

1mo ago Closed

$120k - $261k/yr Full time Senior AI Ai Hardware

This position is no longer accepting applications (closed Oct 25, 2026).

Job Description

Microsoft’s Systems Planning and Architecture (SPARC) team within Azure Hardware Systems and Infrastructure (AHSI) builds the cloud infrastructure that powers Microsoft’s Intelligent Cloud mission. As a Senior Hardware Security Engineer in Redmond, WA (onsite), you’ll help shape security infrastructure for AI technologies and platform components across the full product lifecycle, from threat modeling and secure silicon design through manufacturing, supply chain, and high-scale deployment.

This role supports security architecture for core AI technologies (including accelerator modules such as MAIA) and helps ensure platform components can meet throughput and latency expectations. You’ll partner with security and platform infrastructure teams as designs move from silicon to platform management.

What you’ll do

Architect security infrastructure around core AI technologies so platform components work together effectively with throughput and latency requirements.
Develop AI agents to support security analysis of code and architecture.
Perform threat model analysis for platform components and their interactions across the system.
Work from open-ended problem statements by translating business requirements and fleet telemetry into clear technical problem definitions.
Own infrastructure management architecture during the design phase, guiding solutions from silicon through platform.
Collaborate across multiple phases of product development as priorities shift through architecture, design, and validation.

What you’ll bring

Master’s Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related field AND 3+ years of technical engineering experience, OR Bachelor’s Degree in a related field AND 5+ years of technical engineering experience, OR equivalent experience.
Ability to meet Microsoft, customer, and/or government security screening requirements, including completion of the Microsoft Cloud Background Check (required to pass upon hire/transfer and every two years thereafter).
10+ years of professional experience spanning architecture, design, and validation of SOC internal blocks for SOCs such as CPU, GPU, or networking devices.
Demonstrable skills in System Verilog, synthesis tools, pre-silicon timing path debug and fixes, UVM, and C and Python; Rust knowledge is a plus.
Familiarity with PCIe architecture and server architectures is a strong advantage.
Ability to debug and resolve issues that span multiple subsystems.
Comfort learning newer areas and operating across architecture, design, and validation with a flexible, multi-hat approach.
Strong problem solving, debugging, and troubleshooting skills, plus advanced design and development capability.

Technologies you’ll work with

System Verilog, Synthesis tools, UVM
C, Python
Rust (good to have)
PCIe

Compensation

Salary range: USD 119,800 - 261,000 per year. The typical base pay range across the U.S. is USD $119,800 - $234,700. Base pay ranges vary by location, including San Francisco Bay area and New York City metro area where the range is USD $160,200 - $261,000. Certain roles may be eligible for benefits and other compensation. Additional pay information is available at: https://careers.microsoft.com/us/en/us-corporate-pay.

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1mo ago

Senior Silicon Security Engineer

Google Sunnyvale, CA

Sunnyvale, CA

1mo ago Closed

$174k - $252k/yr Full time Senior Embedded Systems Embedded Systems Security

This position is no longer accepting applications (closed Oct 24, 2026).

Job Description

Join a team focused on strengthening the security of open source silicon roots of trust. In this on-site role in Sunnyvale, CA, you will help design, verify, and harden silicon security architectures that support widely used projects, including Caliptra and OpenTitan. This position combines technical depth across security engineering, verification, and external collaboration with vendors, alongside hands-on work spanning EDA tooling and code hosting workflows in an open source context.

What you’ll do

Collaborate in a cross-company partnership with a dedicated focus on security silicon.
Develop security architecture, along with silicon design and verification, for open source silicon projects: Caliptra and OpenTitan roots of trust.
Oversee silicon design verification and maintain EDA tool workflows within a code hosting platform used in an open source context.
Lead external silicon design verification efforts through vendor partners.
Assess vulnerabilities in silicon root of trust designs to support security improvements over time.

What you bring

Bachelor’s degree or equivalent practical experience.
5 years of experience in security assessments, security design reviews, or threat modeling.
5 years of experience in security engineering, computer and network security, and security protocols.
5 years of coding experience in one or more general purpose programming languages.
Experience with EDA tools and typical ASIC design and verification flows.

Preferred qualifications

Experience with hardware, firmware, and systems programming.
Experience with hardware system architecture.
Experience with risk assessment and threat models.

Compensation: USD 174,000 - 252,000 per year.

Technologies you’ll work with: EDA tools, ASIC design and verification flows, Caliptra, OpenTitan, security protocols, and code hosting platforms in an open source context.

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Hardware Engineer Cybersecurity Jobs

Senior/Principal R&D Cybersecurity - Semiconductor Fabrication Process Engineer

Security Engineer, Data Center Network Device Security

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